8:30 -
9:00 Welcome Coffee |
SESSION 3 3D Systems for
Machine Learning and Memory architecture Chairman: Subhasish Mitra, Stanford Univ., USA
|
9:00 - 9:30
| 3D
Systems for Machine Learning | Paul
Franzon, Univ. of North Carolina, USA |
9:30 - 10:00 | NTX:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on
Large In-Memory Datasets | Luca Benini, Univ. Bologna, Italy and ETH Zurich, Switzerland |
10:00 - 10:30 | Challenges
of 3D DRAM Memories | Christian Weis,
Univ. of Kaiserslautern, Germany |
10:30 - 11:15 Coffee Break |
SESSION 4 3D Technology:
Keynote and Panel Chairman: Severine Cheramy, CEA-LETI, Grenoble, France
|
11:00 - 11:45
| 3D scalability from high performance to ultra low
power | Marcel Wieland, Global Foundry, Germany
|
11:45 - 12:15
| 3D Memory : trends and obstacles | Anton
Korzh, Micron, USA |
12:15 - 13:00 | Panel
"3D Technology : which road for which disruptive architectures ?"
|
Panelists :
- Subhasish Mitra, Univ. Stanford, USA
- Paul Franzon, NCSU, USA
- Marcel Wieland, Global Foundry, Germany,
- Francois Jacquet, KALRAY, France,
- Denis Dutoit, CEA-LETI, France |
13:00 - 14:30 Lunch Break |
SESSION 5 Monolithic 3D
and advanced signalling, Chairman: Laurent Le-Pailleur, STMicroelectronics, France
|
14:30 - 15:00 | 3D
sequential integration : review of opportunities and technology updates | Perrine Batude,
CEA-Leti, France |
15:00 - 15:30 | 3D
sequential integration : overview of 65 nm on 28 nm FDSOI MPW architecture
and design contributions | Sébastien Thuriès,
CEA-Leti, France |
15:30 - 16:00 | Wireline
Communication in 2.5-D and 3-D ICs | Przemyslaw Mroszczyk,
Univ. Manchester, UK |
16:00 - 16:30 Coffee Break |
SESSION 6 3D Advanced
Packaging and CAD tools Chairman: Pascal Vivet, CEA-LETI, France
|
16:30 - 16:55 | Solutions
for high density advanced package design and verification | Pascal Leclaire,
Mentor Graphics, France
|
16:55 - 17:20
| From
2.5D to 3D layout design environment: Status and future challenges for
advanced 3D packaging | Thomas Brandtner,
INFINEON, Austria |
17:20 - 17:45 | CAD Flow methodologies for 3D Hybrid sub-systems | Lise Doyen,
STMicroelectronics, France |
17:45 Closing Remarks, End of day 2
|